1. Field of the Invention
The invention relates to a data processing system, comprising a first data input for receiving data which is organized in data blocks, each data block containing at least one data word and check bits, said first data input being connected to an input of a verifier which serves to verify, under the control of the check bits, whether the data block contains reliable data, and to generate an unreliability signal when a data word does not contain reliable data, said first data input also being connected to a memory for the storage of data words.
2. Description of the Prior Art
A data processing system of this kind is known from GB No. 2,084,363. For each data block received, the verifier verifies, under the control of a check bit associated with that data block, whether the data block contains reliable or unreliable data. When the data block contains unreliable data, the verifier generates an unreliability signal. Under the control of this unreliability signal, the writing of that unreliable data block into the memory is prevented. Thus, only reliable data words are stored in a memory. The data processing system in accordance with said British Patent Application also comprises a separate error flag memory in which, each time when an unreliability signal is generated, an error flag is stored for the unreliable data word in question.
It is a drawback of the known data processing system that such a separate error flag memory is required for the storage of error flags each of which indicates that an unreliable data word has occurred in a data block, said unreliable data word not being stored in the memory. An error flag of this kind often consists of one bit and the data word consists of 8 bits. When the memory is, for example a 2K.times.8 bit RAM, the error flag memory would then comprise a 2K.times.1 bit RAM. This requires additional chip surface area or printed circuit board area. A 2K.times.8 bit RAM is a common commercial type but this implies that the 2K.times.1 bit RAM forms a separate memory which must be separately controlled, so that it requires additional energy and control means. The use of, for example, a specially designed 2K.times.9 bit RAM is undesirable for commercial applications because of the design and manufacturing costs.